<--- Back to Details
First PageDocument Content
Electronics / Computing / Delay-tolerant networking / Satellite Internet / CLEO / Cisco Systems / Network On Chip / Interplanetary Internet / Electronic engineering / Network protocols / Network architecture
Date: 2013-11-16 23:31:38
Electronics
Computing
Delay-tolerant networking
Satellite Internet
CLEO
Cisco Systems
Network On Chip
Interplanetary Internet
Electronic engineering
Network protocols
Network architecture

Microsoft PowerPoint - DTN_Flight_Software.ppt [Compatibility Mode]

Add to Reading List

Source URL: personal.ee.surrey.ac.uk

Download Document from Source Website

File Size: 1,62 MB

Share Document on Facebook

Similar Documents

Computing Routes and Delay Bounds for the Network-on-Chip of the Kalray MPPA2 Processor 4th Workshop on Network Calculus (WoNeCa-4) Marc Boyer (ONERA) Benoˆıt Dupont de Dinechin (Kalray) Amaury Graillat (Verimag, Karla

DocID: 1vrVq - View Document

Appears in IEEE Transactions on Computers? An Efficient Hybrid-Switched Network-on-Chip for Chip Multiprocessors Pejman Lotfi-Kamran, Member, IEEE, Mehdi Modarressi, Member, IEEE, and Hamid Sarbazi-Azad Abstract—Chip

DocID: 1vnig - View Document

VERIFICATION METHODOLOGIES FOR FAULT-TOLERANT NETWORK-ON-CHIP SYSTEMS by Zhen Zhang

DocID: 1vbh2 - View Document

Slim NoC: A Low-Diameter On-Chip Network Topology for High Energy Efficiency and Scalability Maciej Besta1 Syed Minhaj Hassan2 Sudhakar Yalamanchili2 3

DocID: 1ub4W - View Document

On-Chip Ring Network Designs for HardReal Time Systems Miloš Panić1,2, German Rodriguez3, Eduardo Quiñones1, Jaume Abella1, Francisco J. Cazorla1,4 1Barcelona

DocID: 1tRMF - View Document