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IEEE
Results: 22018

#	Item
971	Giotto: A Time-Triggered Language for Embedded Programming THOMAS A. HENZINGER, MEMBER, IEEE, BENJAMIN HOROWITZ, MEMBER, IEEE, CHRISTOPH M. KIRSCH AND Add to Reading List Source URL: cs.uni-salzburg.at Language: English - Date: 2018-07-24 07:01:05
972	Tutorial Proposal 1. Title of Tutorial: Predictive Control - A Simple and Powerful Method to Control Power Converters and Drives 2. Add to Reading List Source URL: ieee-ecce.org Language: English - Date: 2017-06-20 09:43:22
973	INTERNATIONAL ROADMAP FOR DEVICES AND SYSTEMSEDITION Add to Reading List Source URL: irds.ieee.org Language: English - Date: 2018-06-08 17:30:41
974	1 Cross-Layer Design and Analysis of Wireless Networks Using the Effective Bandwidth Function Fumio Ishizaki, Member, IEEE, and Gang Uk Hwang, Member, IEEE Add to Reading List Source URL: queue.kaist.ac.kr Language: English - Date: 2014-11-25 20:15:40
975	CALL FOR PAPERS IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY Special Issue on Visual Computing in the Cloud: Cloud Gaming and Virtualization Part of Visual Computing in the Cloud Special Issue Series On Add to Reading List Source URL: tcsvt.polito.it Language: English - Date: 2014-09-02 13:38:17
976	Committee Meetings All of the following meetings will be held at the David L. Lawrence Convention Center (unless otherwise indicated). To register for PELS meetings, please click here to be directed to the online registr Add to Reading List Source URL: ieee-ecce.org Language: English - Date: 2017-06-20 09:43:04
977	IEEE CPMT Switzerland Chapter Minutes of Administrative Chapter MeetingDate/Time: Add to Reading List Source URL: www.ieee.ch Language: English - Date: 2014-01-05 12:59:58
978	PREPRINT: "M. Hassan, H. Patel, and R. Pellizzoni, "A Framework for Scheduling DRAM Memory Accesses for Multi-Core Mixed-time Critical Syste ms," in proceedings of the IEEE Real-Time and Embedded Technology and Applicati Add to Reading List Source URL: caesr.uwaterloo.ca Language: English - Date: 2017-11-20 15:53:06
979	Architecting On-Chip DRAM Cache for Simultaneous Miss Rate and Latency Reduction Fazal Hameed, Lars Bauer, Member, IEEE, and Jörg Henkel, Senior Member, IEEE Abstract—On-chip DRAM cache has been recently employed in t Add to Reading List Source URL: cesweb.itec.kit.edu Language: English - Date: 2015-10-04 05:30:28
980	From Lyrics to Their Interpretations: Automated Reading between the Lines Kahyun Choi GSLIS University of Illinois MC-493, Suite 329 Add to Reading List Source URL: www.ieee-tcdl.org Language: English - Date: 2015-09-30 16:48:48

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