Giles

Results: 1038



#Item
11Logic / Mathematical logic / Theoretical computer science / Automated theorem proving / Logic in computer science / Formal methods / Logic programming / Propositional calculus / Resolution / Unification / Satisfiability modulo theories / Literal

Instantiation for Theory Reasoning in Vampire Giles Reger Martin Riener University of Manchester, Manchester, UK

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Source URL: www.logic.at

Language: English - Date: 2018-07-19 05:32:19
12Computing / Cross-platform software / Logic in computer science / Runtime verification / Benchmark / Standard Performance Evaluation Corporation / Marq / AspectJ / Java / Overclocking

Third International Competition on Runtime Verification CRV 2016 Giles Reger1 , Sylvain Hallé2 , and Yliès Falcone3 1

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-09-29 14:23:26
13Mathematics / Mathematical logic / Logic / Model theory / Logic in computer science / Semantics / Universal algebra / Boolean satisfiability problem / Interpretation / First-order logic / Resolution / Clause

Finding Finite Models in Multi-Sorted First-Order Logic? Giles Reger1 , Martin Suda1 , and Andrei Voronkov1,2,University of Manchester, Manchester, UK

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-07-20 16:49:46
14Benchmark / Standard Performance Evaluation Corporation / European BEST Engineering Competition / Computing / Information and communications technology

Third International Competition on Runtime Verification (CRV16) Giles Reger, Sylvain Hall´e, Yli`es Falcone RV 2016

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-09-29 14:24:12
15Software / Automated theorem proving / Theoretical computer science / Formal methods / TPTP / Proof assistant / Frama-C / Theorem prover / E theorem prover / Theorem / Isabelle

Checkable Proofs for First-Order Theorem Proving Giles Reger1 , Martin Suda2 1 School of Computer Science, University of Manchester, UK 2 TU Wien, Vienna, Austria

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2017-08-08 03:28:45
16Temporal logic / Formal languages / Logic / Metalogic / Mathematical logic / Linear temporal logic / Mathematics / Model theory / Symbol / Computation tree logic / Interpretation / Well-formed formula

From First-order Temporal Logic to Parametric Trace Slicing Giles Reger and David Rydeheard University of Manchester, Manchester, UK Abstract. Parametric runtime verification is the process of verifying properties of ex

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-07-20 12:50:18
17Computing / Cross-platform software / Logic in computer science / Runtime verification / Benchmark / Standard Performance Evaluation Corporation / Computer performance / Java

Second International Competition on Runtime Verification CRV 2015 Yli`es Falcone1 , Dejan Nickovic2 , Giles Reger3 , and Daniel Thoma4 1

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-07-20 13:08:19
18Program analysis / Typestate analysis / Mathematical logic / Logic / Mathematics / Runtime verification / Quantifier / Type system / Sheaf

Considering Typestate Verification for Quantified Event Automata Giles Reger University of Manchester, Manchester, UK Abstract. This paper discusses how the existing static analyses developed for

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-08-10 12:12:08
19Mathematics / Algebra / Theoretical computer science / Finite automata / Linear algebra / Finite-state transducer / Dynamic programming / Edit distance / Trace / Finite-state machine / Shortest path problem / Levenshtein distance

Suggesting Edits to Explain Failing Traces Giles Reger University of Manchester, UK Abstract. Runtime verification involves checking whether an execution trace produced by a running system satisfies a specification. Howe

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Source URL: www.cs.man.ac.uk

Language: English - Date: 2016-07-20 13:08:32
20Theoretical computer science / Mathematical logic / Logic / Automated theorem proving / Logic in computer science / Formal methods / Logic programming / Predicate logic / Satisfiability modulo theories / Unification / Solver / Resolution

Instantiation and Pretending to be an SMT Solver with VAMPIRE ∗ Giles Reger1 , Martin Suda2 , and Andrei Voronkov1,3,4 1 3

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Source URL: smt-workshop.cs.uiowa.edu

Language: English - Date: 2017-09-02 14:08:49
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