<--- Back to Details
First PageDocument Content
Field-programmable gate array / Reconfigurable computing / Digital electronics / Xilinx / Hardware description languages / Adder / Barrel shifter / VHDL / Joint Test Action Group / Electronic engineering / Electronics / Computer arithmetic
Date: 2013-03-04 12:43:09
Field-programmable gate array
Reconfigurable computing
Digital electronics
Xilinx
Hardware description languages
Adder
Barrel shifter
VHDL
Joint Test Action Group
Electronic engineering
Electronics
Computer arithmetic

Spartan-6 FPGA DSP48A1 Slice User Guide [optional]

Add to Reading List

Source URL: www.xilinx.com

Download Document from Source Website

File Size: 1,64 MB

Share Document on Facebook

Similar Documents

Java Byte Code Synthesis for Reconfigurable Computing Platforms Christophe Dubach Computer Science, master thesis Processor Architecture Laboratory

DocID: 1tNUy - View Document

A Decade of Reconfigurable Computing: a Visionary Retrospective Reiner Hartenstein (embedded tutorial) CS Dept. (Informatik), University of Kaiserslautern, Germany http://www.fpl.uni-kl.de Abstrac

DocID: 1tpFs - View Document

The Proteus Processor — A Conventional CPU with Reconfigurable Functionality Michael Dales Department of Computing Science, University of Glasgow, 17 Lilybank Gardens, Glasgow, G12 8RZ, Scotland.

DocID: 1tlw6 - View Document

Reconfigurable Computing: Paradigmen-Wechsel erschüttern die Fundamente der Informatik Toward Reconfigurable Computing via Concussive Paradigm Shifts Reiner Hartenstein1 (eingeladener Beitrag),

DocID: 1tk7F - View Document

Computing: Reconfigurable versus Rebooting Reiner Hartenstein, IEEE fellow, FPL fellow, RDPS fellow Abstract. There are two different Rebooting Computing communities: one about the attractiveness of computer science educ

DocID: 1tjGX - View Document