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FIFO
Results: 263

#	Item
231	RTS2: meta-queues scheduling and its realisation for FLWO 1.2m telescope d , Martin Fuchse ˇ Petr Kub´aneka , Emilio Falcob , Martin Jel´ınekc , Michael Prouzaa , Jan Strobl and Javier Gorosabelc Add to Reading List Source URL: www.rts2.org Language: English - Date: 2014-06-22 11:16:25 Computing Scheduling FIFO Queue Robotic telescope Input queue Scheduling algorithms Concurrent computing Operations research
232	FIFO WORKFORCE IN THE CAIRNS REGION Add to Reading List Source URL: www.cummings.net.au Language: English - Date: 2014-01-09 23:26:06 States and territories of Australia Geography of Queensland Shire of Mareeba Mount Surprise Queensland James Cook University Far North Queensland Geography of Australia Cairns
233	Forum for Islamforskning Nyhedsbrev – e-mail APRIL 2012 OM FIFO SE WWW.ISLAMFORSKNING.DK Add to Reading List Source URL: islamforskning.dk Language: Danish - Date: 2013-05-02 05:59:31
234	FIFO Workshop og Generalforsamling Tid: 27. maj 2014, kl[removed]Sted: KUA 2, lokale[removed]:00: Workshop på baggrund af oplæg ved Ehab Galal med titlen: ”Forbruget af islamiske ikonografier” Add to Reading List Source URL: islamforskning.dk Language: Danish - Date: 2014-05-27 06:31:35
235	12 Festival International du Film Documentaire Océanien Tahiti – 31 janvier au 08 février 2015 Add to Reading List Source URL: www.fifo-tahiti.com Language: French - Date: 2014-06-19 13:56:38
236	ADB3 OCP Interfacing DMA FIFOs (v1.1 - 30th August[removed]ADB3 OCP Interfacing DMA FIFOs Add to Reading List Source URL: www.alpha-data.com Language: English - Date: 2011-01-28 10:54:30 Cybernetics FIFO Inter-process communication Direct memory access Data structure alignment Parallel ATA Conventional PCI Universal asynchronous receiver/transmitter Computer hardware Computing Computer memory
237	System Synthesis Based on a Formal Computational Model and Skeletons Ingo Sander, Axel Jantsch Department of Electronics, Royal Institute of Technology, Stockholm, Sweden Abstract Formal approaches to HW and system desig Add to Reading List Source URL: web.it.kth.se Language: English - Date: 2002-02-20 05:41:54 Electronic design automation Digital electronics Formal methods VHDL FIFO High-level synthesis Function model Verilog Concurrent computing Electronic engineering Hardware description languages Cybernetics
238	26 Inside scsynth Ross Bencina This chapter explores the implementation internals of scsynth, the server process of Add to Reading List Source URL: supercolliderbook.net Language: English - Date: 2011-04-21 15:33:09 Data types Primitive types C++ Scheduling algorithms Pointer SuperCollider Circular buffer C++ classes FIFO Computing Software engineering Computer programming
239	Introduction to Lock-Free Algorithms Through a case study Samy Al Bahra AppNexus, Inc. September 23, 2012 Add to Reading List Source URL: concurrencykit.org Language: English - Date: 2012-09-25 17:45:50 Concurrency Non-blocking algorithm FIFO Spinlock Lock Linearizability Concurrency control Computing Concurrent computing
240	KineticSystems CAMAC Timed 12-Bit DAC Module Data Sheet[removed] Add to Reading List Source URL: www.kscorp.com Language: English - Date: 2013-05-16 14:23:31 Digital signal FIFO Digital-to-analog converter SystemC Digital signal processing Electronic engineering Electronics

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