Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip

First Page		Document Content
Date: 2015-05-29 10:12:01 Engineering Computing Fault-tolerant computer systems Electromagnetism Synchronization Distributed computing Knowledge representation Edsger W. Dijkstra Self-stabilization Metastability in electronics Clock synchronization Phase-locked loop		Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip Add to Reading List Source URL: people.mpi-inf.mpg.de Download Document from Source Website File Size: 1,85 MB Share Document on Facebook

	Verification of Fault-Tolerant Protocols with Sally Bruno Dutertre, Dejan Jovanovi´c, and Jorge A. Navas Computer Science Laboratory, SRI International Abstract. Sally is a model checker for infinite-state systems that DocID: 1xVqL - View Document
	Verification of Fault-Tolerant Protocols with Sally Bruno Dutertre, Dejan Jovanovi´c, and Jorge A. Navas Computer Science Laboratory, SRI International Abstract. Sally is a model checker for infinite-state systems that DocID: 1xUKn - View Document
	Cluster Fault-Tolerance: An Experimental Evaluation of Checkpointing and MapReduce through Simulation Thomas C. Bressoud #1 , Michael A. Kozuch ∗2 # DocID: 1rqZy - View Document
	Attested Append-Only Memory: Making Adversaries Stick to their Word Byung-Gon Chun† Petros Maniatis⋆ Scott Shenker†‡ † DocID: 1rqQM - View Document