G RATER: An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration Atieh Lotfi∗ , Abbas Rahimi† , Amir Yazdanbakhsh‡ , Hadi Esmaeilzadeh‡ , Rajesh K. Gupta∗ ∗ UC - Data parallelism - Document - PDFSEARCH.IO

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	G RATER: An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration Atieh Lotfi∗ , Abbas Rahimi† , Amir Yazdanbakhsh‡ , Hadi Esmaeilzadeh‡ , Rajesh K. Gupta∗ ∗ UC Add to Reading List Document Date: 2015-12-02 17:48:13 Open Document File Size: 283,58 KB Share Result on Facebook

G RATER: An Approximation Workflow for Exploiting Data-Level Parallelism in FPGA Acceleration Atieh Lotfi∗ , Abbas Rahimi† , Amir Yazdanbakhsh‡ , Hadi Esmaeilzadeh‡ , Rajesh K. Gupta∗ ∗ UCAdd to Reading List