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An Integrated Hardware-Software Approach to Flexible Transactional Memory∗ Arrvindh Shriraman Hemayet Hossain Sandhya Dwarkadas
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Document Date: 2007-01-31 16:34:34


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File Size: 573,73 KB

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Company

IBM / Sun Microsystems Laboratories / RTM / Intel / Microsoft / Descriptor Old / /

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Facility

University of Rochester / /

IndustryTerm

software system / multicore chips / stock processors / pure hardware / software protocol / parallel hardware / software policy / software branches / coherence protocols / policy in software / software implementations / conventional coherence protocol / typical hardware / software hybrid / software-controlled conflict detection / coherence protocol / cache coherence protocol / contention management / scientific computing / Software control / legacy hardware / remote processor / /

Organization

Flexible Transactional Memory∗ Arrvindh Shriraman Hemayet Hossain Sandhya Dwarkadas Michael F. Spear Virendra J. Marathe Michael L. Scott Department of Computer Science / National Science Foundation / University of Rochester / /

Person

All / Txn / Michael F. Spear Virendra / Michael L. Scott / /

Position

cache controller / potentially conflicting writer / conflicting writer / software contention manager / writer / runtime designer / controller / overflow writer / programmer / /

ProgrammingLanguage

C++ / /

Technology

base protocol / TMESI protocol / MESI coherence protocol / multicore chips / simplified TMESI protocol / API / coherence protocol / software protocol / Cloning / directory-based protocols / operating system / remote processor / cache coherence protocol / flash / CMP / coherence protocols / conventional coherence protocol / local processor / /

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