| Document Date: 2011-03-31 21:31:46
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Company Silicon Graphics / / / Facility Computer Science University of Rochester Rochester / / IndustryTerm time-slicing processors / parallel applications / systems / data-structure-specific non-blocking algorithms / non-blocking algorithm / parallel solution / preemption-safe algorithms / synthetic applications / multiprocessor systems / non-blocking atomic update algorithms / synchronized parallel applications / non-blocking solution / multiprocessor operating systems / Non-blocking algorithms / / OperatingSystem Irix / / Organization National Science Foundation / Computer Science University of Rochester Rochester / Michael L. Scott Department / / Person Michael L. Scott / / Position pseudo-scheduler / Traveling Salesman / scheduler / salesman / programmer / / ProgrammingLanguage J / / Technology 12 processors / Alpha / one processor / Non-blocking algorithms / interrupted processor / time-slicing processors / two processors / 5 6 7 Processors / non-blocking algorithm / data-structure-specific non-blocking algorithms / non-blocking atomic update algorithms / caching / 1 2 3 4 5 6 7 Processors / same processor / operating system / nonāblocking 0.5 1 2 3 4 5 6 7 Processors / 1 0.5 1 2 3 4 5 6 7 Processors / Shared Memory / operating systems / 11 processors / /
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Tech. Rep[removed]Concurrent Update on Multiprogrammed Shared Memory Multiprocessors Maged M. Michael