| Document Date: 2015-03-09 18:38:34
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City Zurich / Bologna / / Company HP Laboratories / GPU / Google / SIAM Journal / Synopsys / RTL / / Country Switzerland / Italy / / Facility store L / Building Broken Chips / / IndustryTerm approximate computing technique / video processing algorithms / nm technology / large inter-row scalar products / inter-row products / energy split / positive-definite systems / sparse systems / co-processors / matrix on-chip / parameterizable multi-precision software model / scalar products / real-time video processing / on-chip memory vs. off-chip / Linear solver algorithms / synthesis algorithms / equation systems / solve/s energy / scalar-products / image signal processor / energy / high energy efficiency / large systems / off-chip / scan-line processing / energy consumption / video processing applications / pixel dense solution / chip / image processing / sparse linear systems / approximate solution / row-vector product / inter-row scalar products / energy efficiency / generation technologies / nP ar wide scalar-product / energy time / attractive solution / linear systems / on-chip / image processing applications / / Organization National Science Foundation / Swiss Confederation / ASIC / / Person Substitution / Luca Benini / Denis Dutoit / Michael Schaffner / / Position LPDDR2 Memory Controller / memory controller / PHY and memory module / representative / Forward / Area Estimation LPDDR IF Model IP Models / memory controller / DRAM controller / controller / / Product Analyzer / LPDDR3 memory interface / LPDDR3 / / ProgrammingLanguage C++ / / Technology FPGA-based processor / FPGA / matrix on-chip / RAM / generation technologies / 28 nm technology / synthesis algorithms / separate chip / video processing algorithms / Linear solver algorithms / Streaming Video / image signal processor / SRAM / mobile device / image processing / mobile devices / 28 nm CMOS technology / on-chip memory vs. off-chip / ASIC / ISP / simulation / DSP / / URL www.micron.com/products/support/power-calc / www.fool.com/investing/general/2014/06/04 / www.rmit3dv.com / www.eecs.berkeley.edu/∼bkeller/rekall.pdf / www.jedec.org/lpddr3-presentations / /
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DRAM or no-DRAM? Exploring Linear Solver Architectures for Image Domain Warping in 28 nm CMOS Michael Schaffner∗† , Frank K. G¨urkaynak∗ , Aljoscha Smolic† , Luca Benini∗‡ ∗ ETH Z¨urich, 8092 Z¨urich, Sw