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Company SYNOPSYS / Xilinx / the AES / Reconfigurable Hardware / / Country Belgium / / / Facility National Institute of Standards and Technology / / IndustryTerm synthesis tool / Composite field solution / software implementations / obvious solution / / Organization National Institute of Standards and Technology / Jean-Didier Legat UCL Crypto Group Laboratoire de Microelectronique Universite Catholique de Louvain Place / / Person Jean-Didier Legat / Francois-Xavier Standaert / / Position designer / / Product Rijndael / / Region Levant / / Technology Encryption / Block cipher / FPGA / RAM / VirtexE technology / Virtex-E technology / s/N / VHDL / described using VHDL / / SocialTag 
Efficient Implementation of Rijndael Encryption in Reconfigurable Hardware: Improvements and Design Tradeoffs Francois-Xavier Standaert, Gael Rouvroy, Jean-Jacques Quisquater, Jean-Didier Legat UCL Crypto Group