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Chisel 2.2 Tutorial Jonathan Bachrach, Krste AsanoviĀ“c, John Wawrzynek EECS Department, UC Berkeley {jrb|krste|johnw}@eecs.berkeley.edu July 10, 2015
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Document Date: 2015-07-10 18:48:11


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File Size: 608,64 KB

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Facility

A port / Primitive port / /

IndustryTerm

hardware operator / /

Organization

John Wawrzynek EECS Department / ASIC / UC Berkeley / /

Person

John Wawrzynek / Krste Asanovi / /

ProgrammingLanguage

C++ / Verilog / Scala / /

Technology

functional programming / FPGA / object-oriented programming / Finite State Machine / VHDL / ASIC / Mems / SRAM / simulation / Verilog / /

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