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Computer programming / Automatic parallelization / Dynamic recompilation / Binary translation / Vectorization / Profiling / Loop unwinding / Pin / Multithreading / Computing / Parallel computing / Compiler optimizations


Journal of Instruction-Level ParallelismSubmitted 6/07; published 6/08 Dynamic Parallelization and Vectorization of Binary Executables on Hierarchical Platforms
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Document Date: 2008-08-06 16:42:16

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File Size: 327,79 KB

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Company

Voss / Intel / /

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Facility

Computer Sciences University of California / /

IndustryTerm

heterogeneous processing elements / complicated conventional hardware / even entry-level systems / physical processor / lightweight software / cluster computing / mainstream x86 processors / parallel processing capabilities / legacy software / software layer / software-based techniques / thin software layer / thin software / multiprocessor systems / parallel processors / slave processors / software cache / Trace processors / /

Organization

Information and Computer Sciences University / School of Information / University of California / Irvine / /

Person

Franz Superblock / Yardımcı / /

Position

programmer / /

Product

Mid-Level Parallelism Our / /

ProvinceOrState

California / /

Technology

VLIW processor / virtual machine / explicitly parallel processors / Crusoe processor / parallel processors / same physical processor / SMT processor / Crusoe / Itanium processors / caching / simulation / shared memory / Trace processors / Cell processor / mainstream x86 processors / parallel processing / just-in-time compiler / CMP / /

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