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Electronic design / Verilog-AMS / Electronic test equipment / SystemVerilog / Signal generator / Analog verification / Verilog / E / System on a chip / Electronic engineering / Hardware description languages / Hardware verification languages


White Paper Using Digital Verification Techniques on Mixed-Signal SoCs with CustomSim and VCS March 2011
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Document Date: 2014-11-07 14:39:04


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File Size: 1,61 MB

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Company

VDD / Synopsys / /

Facility

Square Waveform Generator In addition / /

IndustryTerm

system-on-chip / testbench technology / mixed-signal solution / voltage carrier / /

Person

VMMAMS G D ADC / Adiel Khan Abhisek Verma Bradley / /

Position

Scenario manager / manager Sub-System / model external perturbation / ConstrainedRandom Generator Bus-Functional model Generator Driver / SC AHB VIP Driver / architect / engineer / /

ProgrammingLanguage

RC / Verilog / /

Technology

Ethernet / RAM / ADC / AMS testbench technology / AMS Checkers As VCS AMS testbench technology / Analog IP AMS Assertions VCS AMS testbench technology / Frequency Checker Voltage References The VCS AMS testbench technology / Architecture The VCS AMS testbench technology / simulation / Verilog / well-defined protocols / system-on-chip / VCS AMS testbench technology / /

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