| Document Date: 2005-10-16 18:16:47
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Company IBM / / / Facility Urbana-Champaign Thomas M. Siebel Center / Computer Science University of Illinois / / IndustryTerm near-memory processor / conventional superscalar processors / convolutional encoder algorithm / vector processor / / NaturalFeature Bit stream / / OperatingSystem L3 / / Organization University of Illinois / Urbana-Champaign Thomas M. Siebel Center for Computer Science / / Person Marc Snir / R. Brett Tremaine / Vector Specifier / Josep Torrellas / Mingliang Wei / Memory Figure / John McCalpin / Thomas J. Watson / / Position correspondent / Processor L3 Cache NMP Processor Processor Processor L2 Cache L2 Cache Fabric Controller Fabric Controller / General / producer / Head / current head / controller / / ProgrammingLanguage C / / Technology conventional superscalar processors / Processor L3 Cache NMP Processor Processor Processor / 2005 Abstract The Near Memory Processor / convolutional encoder algorithm / vector processor / main processors / Cache Memory / 4 3DES encryption / shared memory / 3DES encryption / near-memory processor / / URL http /
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Report No. UIUCDCS-R[removed]UILU-ENG[removed]A Brief Description of the NMP ISA and Benchmarks